Memory is. used to storing data.

Types of memories:

• RAM

•ROM

RAM is a Random Access Memory or Read/Write Memory. One can read and write in RAM.

RAM is of two types:

• SRAM

• DRAM.

SRAM : It is also known as static RAM. In SRAM data will remain stored temporary as long as power is supplied. The basic cell in SRAM is a flip-flop.

DRAM : It is also known as dynamic RAM. In DRAM the basic cell is a capacitor.

ROM : ROM is the Read Only Memory. It is a permanent storage device. It is used in computers, microprocessors.

ROM is of four types

(a) Masked ROM

(b) PROM

(G) EPROM

(d) EEPROM.

(a) Masked ROM : It is stored permanently through photomasking during fabrication. This programming is done through masking and metalization process.

(b) PROM : It is the programmable read only memory.

(c) EPROM : It is the erasable programmable read only memory.

(d) EEPROM : It is the electrically erasable programmable read only memory

DMA: It is Direct Memory Access. In this scheme, data is transferred between

memory and I/O device by bypassing microprocessor.

Data transfer techniques are classified into

1. Parallel data transfer techniques

2. Serial data transfer techniques

3. Synchronous data transfer techniques

4. Asynchronous data transfer techniques

5. Interrupt driver data transfer techniques.

9. The 8251 USART supports synchronous and asynchronous modes of operation.

10. The mode word and command word for an 8251 remains same—for transmitter and receiver.

Q 1. Write short note on semiconductor memory.

Ans. Semiconductor memory : Semiconductor memory is used to store data. The

main advantages Of semiconductor memories are

1. Small in size

2. Low cost

3. Better reliability

4. High speed

Volatile Memory : If the information stored in a memory is lost when the electrical

power is switched OFF, then the memory is called as volatile memory. These are called RAM (Random Access Memories).

Non-volatile Memory : If the information once stored in memory does not change

unless altered deliberately are called as non-volatile memory. These are ROM, PROM, EPROM etc. 

Q 2. Differentiate between parallel data transfer and serial data transfer.   

Q 3 Distinguish between synchronous and asynchronous data transfer.

ans.

Q 4 Define following terms

(a) Simplex

(b) Duplex

(c) Half duplex

(d) Full duplex

Ans (a) Simplex It is one way transmission on the other hand the connection in such a way that transfer data only in one direction

(b) Duplex It is two way transmission It transfer data in both direction

(C) Half duplex It is also two way transmission But it is a connection between two terminals such that, data may travel in both the directions as well as transmission activated in one direction at a time

(d) Full duplex It is a connection between two terminals such that data may travel in both the directions simultaneously So it will contain one way transmission or two way transmission at a time.

Q 5 Give the applications of 8251 programmable communication interface chip

Ans 1 8251 can be used to transmit receive serial data Data transmission to a CRT terminal using the 8251 in status check mode

2. A programmable chip designed for synchronous/asynchronous serial data communication.

Q 6. What is DMA data transfer? Explain in brief.

Ans. DMA implies direct memory access. Either in programmed I/O or interrupt I/O

transfer, the data between the I/O devices and external memory is via the accumulator. For voluminous data transfer, there are the time commuting and even through the I/O devices speed matches with speed of UR So there is direct transfer of data directly between the I/O device and external memory without going through accumulator. This is called DMA.

Q7. Explain what is SIM.

Ans. This is  Set Interrupt Mask

• This is a 1 byte instructions.

• This instructions reads the contents of the accumulator and enables or disables the -interrupts according to the contents of the accumulator.

• Bits W7 and W6 of accumulator are used for serial I/O and do not affect the interrupts. D6 1 enables the serial I/O.

Q 8. What is the last instruction executed by every interrupt?

Ans. The last operation is to retrieve the relearn address from the stack memory and loaded in the PC to contrive the main program.

PUSHCS

PUSHIP

Q.9  What is contained in interrupt vector table of each interrupt?

Ans. The interrupt vector table holds the starting address of the interrupt subroutine:

The starting address of interrupt service subroutine (ISS) is after called interrupt sector.

Q 10. Why data transfer with DMA is accelerated?

Ans. Because DMA scheme of data transfer is commonly used for high speed data transfer. For example, data transfer between the memory and a floppy disk. A DMA controller is necessary for the DMA transfer which can allow the peripheral to transfer the data into or form the memory. 

Q 11. It compare peripheral I/O and memory mapped l10 

ans.

Q 12 Write down the communication steps with 110 devices which are similar to those in communicating with memory

Ans The steps in communicating with an I/O device are:

(i) The micro processing unit places an 8 bit address on the address bus, that is decoded by the external logic

(ii) The micro processing unit places an 8-bit address on the address bus, which is decoded by external decode logic

(iii) The micro processing unit sends a control signal (I/O Read or I/O Write) and enables the I/O device

(iv) Data is transferred using the data bus.

Q 13 Why the number of 0/P ports in peripheral mapped I/O is restricted to 256’

 Ans In I/O addressing mode 8085 has capability of 8 bit I/O address through which it can address 255 I/O ports.

Q 14 Discuss DMA controller briefly .

Ans In I/O data transfer data is transferred by using microprocessor The microprocessor will read data from I/O device and then will write data to memory

1. In this case there are two operations for single data transfer.
2. If the data is less, then micro process will not waste its time ; transferring data from I/O to memory or back. But suppose, data is huge, then the transfer rate from I/O to memory or back will slow down because of microprocessor intervention. In such case, to speed up the process of transferring the data, we can think, Can I/O have direct access to memory and the answer is, yes.
3. It can have Direct memory access (DMA), but under Supervision. The device which supervises, data transfer is named as DMA controller.
4. Now let’s have diagrammatic representation of the scheme, which depicts microprocessor, DMA controller, memory and I/O device.
   Q 15. Name the two modes used by the DMA processor to transfer data.
   
   
   Ans. 1. Burst or Block Transfer DMA
   2. Cycle Steal or Single Byte Transfer DMA.
   
   
   Q16. List the features of 8251.
   
   
   Ans. Features of 8251
   1. It supports both synchronous and asynchronous modes of operation.
   2. The synchronous baud rate — DC to 64 K baud.
   3. The asynchronous baud rate — DC to 19.2 K baud.
   4. The synchronous mode supports 5-8 bits characters.
   5. In asynchronous mode it supports 5-8 bits characters.
   6. It contains full duplex system.
   Q 17. DrawBlock diagram of 8251.
   OR
   What is the function of 8251 chip’ Discuss in detail
   
   
   Ans 8251 (USART) USART is Universal Synchronous/Asynchronous Receiver and Transmitter 8251 supports both synchronous as well as asynchronous data transfer It contains full duplex double buffered system It provides error detection logic, detects parity over run, framing errors It uses separate TxC and RxC clock inputs for  transmitter and receiver So transmitter and receiver can be operated in different baud rates
   Synchronous baud data rate — DC to 64K baud
   Asynchronous baud rate — DC to 192 K baud
   
   
   8251 Block diagram The 8251 is a 28 pin DIP package all inputs and outputs are TTL compatible The block diagram of 8251 contains following blocks
   1 Data bus buffer
   2 Read/write control logic
   3 Transmitter section
   4 Receiver section
   5 Modem control
   1 Data Bus Buffer It is a 3 state bi-directional, buffer used to interface internal data bus of 8251 to the system data bus The direction of data transfer through data bus buffer is decided by and This buffer transfers control word, status word data for transmitter and data from receiver, depending on signal given by R/W control logic
   
   
   2 Read/Write Control Logic This block accepts different control signals such as RD, WR C/D CS, CLK and Reset from control bus and generate control signals for device operation.
   
   
   3. Transmitter Section: It is accepts parallel data from the data bus buffer. The contents of the transmitter buffer are automatically transferred to output register if the output register is empty. The data is shifted oUt serially on the TxD pin for asynchronous mode start bit and stop bits are added to data byte for synchronous mode synchronous characters are transferred before the data bytes.